1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) having a storage capacitor. More specifically, the present invention relates to improving the image quality of an LCD device by reducing the fluctuations in the capacitance of the storage capacitor.
2. Discussion of the Related Art
A thin film transistor (TFT) LCD includes TFTs functioning as switching devices, capacitors including liquid crystals between an upper plate electrode and a lower plate electrode, subsidiary capacitors, gate lines, and data lines.
For driving a TFT-LCD, a signal voltage is applied to a gate electrode, the TFT then turns on so that a data signal with image data is transmitted to the liquid crystals through the TFT. In the above-described case, the liquid crystals in the capacitor are charged. Ideally, the total electric charge that is stored in the liquid crystals remains constant until the next signal is applied.
However, the liquid crystal voltage varies due to the existence of various sources of capacitance by an amount .DELTA.V, which is expressed by the following approximate formula. .DELTA.V=Cgd*Vg/(Cgd+CLC+Csto), where .DELTA.V is the maximum amount of variation of the liquid crystal voltage, Cgd is the parasitic capacitance due to the overlap between gate and drain electrodes, CLC is the liquid crystal voltage, Csto is the capacitance of a storage capacitor, and Vg is the voltage of the gate electrode. The existence of .DELTA.V causes distortion in the liquid crystal voltage and is the primary reason for flickering in the LCD. To decrease .DELTA.V, it is preferable to increase the capacitance of the storage capacitor Csto.
FIG. 1 is a layout view of a LCD having a gate storage capacitor according to the related art. FIG. 2 is a cross-sectional view of the LCD of FIG. 1. Referring to FIG. 1 and FIG. 2, a pixel is defined on a substrate 100 by the intersection of the gate line 11L and data line 15L. A gate electrode 11G is connected to the gate line 11L, a source electrode 15S is connected to the data line 15L, and a drain electrode 15D is arranged so as to oppose the source electrode 15S. An active layer 13 is overlapped with the above-mentioned three electrodes and constitutes a TFT for use as a switching device. A pixel electrode 17 is connected to the drain electrode 15D and covers the pixel area.
A gate storage capacitor is provided by a portion of the gate line 11L, a portion of the pixel electrode 17 which is overlapped with the gate line 11L, another portion of the gate line 11L, and a subsidiary electrode 18 that is overlapped with a portion of the gate line 11L.
For the sake of explanation, in the present specification, a storage capacitor will be defined by the subsidiary electrode 18 and a portion of the gate line which is overlapped by the subsidiary electrode 18.
In the related art, a structure of the storage capacitor includes a gate line 11L for defining a first electrode of a storage capacitor on a substrate 100, and a gate insulating layer 12 disposed on an exposed surface of the substrate 100 including the gate line 11L, a subsidiary electrode 18, which is made of a metal that is used to form the source/drain region, disposed on the gate insulating layer 12. A passivation layer 14 covers the subsidiary electrode 18, and a contact hole is provided in the passivation layer 14 and exposing a portion of the subsidiary electrode 18. A pixel electrode 17 is connected to the subsidiary electrode 18 through the contact hole that is provided in the passivation layer 14.
The capacitance of the storage capacitor is expressed as `C.varies.A/d`, where A is the overlapped area between the subsidiary electrode and the gate line, which defines the two electrodes of the storage capacitor, and d is the thickness of the gate insulating layer, which defines the dielectric layer between the electrodes.
However, in the above-described related art structure, the subsidiary electrode is made by patterning a conductive layer for the source/drain region via a photolithography process. In carrying out the photolithography process, the position of the subsidiary electrode 18 may vary due to process errors such as misalignment of the photo mask, or the exposure, or the etchant, or other reasons.
Note that when the overlapped width between the subsidiary electrode 18 and gate line 11L is defined, d1 is set, and the overlapped width becomes equal to or less than d1 since the subsidiary electrode 18 may move due to manufacturing deviations. Because the capacitance fluctuates greatly due to manufacturing deviations, the subsidiary electrode 18 is designed to be small so as to compensate for the manufacturing deviations. Thus, the capacitance of the storage capacitor is reduced because of the reduction in the overlapped area between the subsidiary electrode 18 and the gate line 11L. Accordingly, the conventional LCD has very poor image quality due to flickering and other image defects.